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首页 > 电子元器件选型 > 电容器 > 陶瓷电容器

GRM32ER61E226KE15L

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GRM32ER61E226KE15L
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muRata(村田)

Ceramic Capacitor, Multilayer, Ceramic, 25V, 10% +Tol, 10% -Tol, X5R, 15% TC, 22uF, Surface Mount, 1210, CHIP, ROHS COMPLIANT

市场均价:
¥2.7531
市场总库存:
848,163
生命周期状态: Not Recommended
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参考设计

(22)
Altera Arria V SoC Power Supply Reference Design - PMP9360.6 - TI Tool Folder
PMP9360: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Arria V SoC Power Supply Reference Design
PMP9360.6: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Arria V SoC Power Supply Reference Design
PMP9360.4: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Arria V SoC Power Supply Reference Design
PMP9360.5: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Non sync buck Hysteretic Controller for 9-18V input and 8V,3A output
PMP7771: This circuit is a non synchronous buck hysteretic controller. It uses a low ESR ceramic capacitor at the output and uses a series resistor to generate the ripple. It uses LM3489 which is a high efficiency PFET switching regulator controller. The PFET architecture also allows for low component count as well as ultra-low dropout, 100% duty cycle operation. Another benefit is high efficiency operation at light loads without an increase in output ripple.
120V AC input and 24.5V output LED Driver
PMP7770: It is an offline AC-DC LED driver. It has TRIAC dimming capability. It is basically a low side buck which has valley filled PFC. It takes an input voltage of 120V AC. This circuit uses LM3445 which is an adaptive constant off-time AC/DC buck (step-down) constant current controller designed to be compatible with Traic dimmers.
48V-60VDC Input, 12V/250W Active Clamp Forward Reference Design
PMP9656: This reference design generates a 12V/21A output from 54V DC input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD18532Q5B, implemented as self-driven synchronous rectifiers, allow this design to achieve a max load efficiency of nearly 96%. The compact UCC27511 drivers simplify the gate drive circuitry for the synchronous rectifiers.
Xilinx(r) Ultrascale(r) 16nm FPGA/SoC Power Solution for Mobile Radio Basestation with PMBus
PMP10555: The PMP10555 reference design provides all the power supply rails necessary to power Xilinx® Ultrascale® 16nm family of FPGAs/SoCs in a mobile radio basestation application. This design uses a PMBus compatible 20A integrated FET buck converter for the core and two multi-output buck regulator ICs to provide the remaining supplies necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
Altera Arria V SoC Power Supply Reference Design
PMP9360.3: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Arria V SoC Power Supply Reference Design
PMP9360.2: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Xilinx Kintex UltraScale FPGA Power Solution Reference Design with PMBus
PMP9444: The PMP9444 reference design provides all the power supply rails necessary to power Xilinx's Kintex UltraScale family of FPGAs. It features two UCD90120A's for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the PMBus interface. This design uses a 12V input.
Non sync buck controller with 20 to 27V input and 4.5 to 17V @ 1.4A output
PMP7772: PMP7772 is a non sync buck regulator. It has an input of 20V to 27V and output of 4.5V to 17V @ 1.4A. LM5575 uses Emulated Current Mode control architecture which provides inherent line regulation, tight load transient response and ease of loop compensation without the usual limitation of low duty cycles associated with current mode regulators. It incorporates ADJ pin to smoothen the output voltage on the fly.
6V-33V input to 16.7V output@1.75A, Buck Boost Converter
PMP7759: It is a Buck Boost configuration where input ranges from 6V to 33V DC. The output has 5 LEDs in the string producing 16.7V in the output. It uses NTC for thermal shutdown thereby protecting the circuit in case of high temperature issues. It can be used in Indoor and Outdoor area SSL, Automotive, General illumination etc.
85V - 265V AC in, 12V/3.3A AC/DC Open Frame Power Supply Based on PSR Flyback Reference Design
PMP9576: This reference design provides an isolated 12V/3.3A output from a universal 85V-265V AC input. This design achieves efficiencies greater than 84%. Employing the UCC28710D Primary Side Regulation (PSR) Flyback controller eliminates the opto-coupler and secondary side regulation components. The energy saving features of the UCC28710D allow this design to consume less than 75mW when plugged into the wall with no device attached to the output.
3 LED Driver
PMP7866: This is an LED driver/converter that can power up to three high output LEDs. It has an input voltage range of 9V-to-16Vin and an output of 10.5Vout @ 1A.
Altera® Stratix® V FPGA Power Solution
PMP9365: The PMP9365 reference design provides all the power supply rails necessary to power Altera's Stratix V family of FPGAs. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
8V-36V Input 12V/7A; Active Clamp Forward Reference Design
PMP5123: This reference design generates an isolated 12V/7A output from an 8V to 36V DC input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD19533Q5A and CSD19534Q5A allow this design to achieve a max load efficiency over 93%, with a peak efficiency of over 94%. The compact UCC27511 drivers simplify the gate drive circuitry for the synchronous rectifiers.
Altera Arria V SoC Power Supply Reference Design
PMP9360.1: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Arria V SoC FPGA Power Solution Reference Design
PMP9360: The PMP9360 reference design is a complete power solution for Altera's Arria V™ SoC devices. This design uses several LMZ3 series modules , an LDO, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power up sequencing.
Altera Arria V SoC Power Supply Reference Design
PMP9360.7: This reference design provides all the power supply rails necessary to power Altera's Arria V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
36V-72Vdc Input, 12V/200W Active Clamp Forward - Reference Design
PMP3162: This reference design generates a 12V/16A output from a standard 48V DC telecom input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD19533Q51, implemented as self-driven synchronous rectifiers, allow this design to achieve a peak efficiency of 95%. The compact UCC27511 drivers simplify the gate drive circuitry for the synchronous rectifiers.
Xilinx Virtex UltraScale FPGA Power Solution with PMBus Reference Design
PMP9475: The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in a compact, highly efficient design. This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of design/configuration and telemetry of critical rails. It features a UCD90120A for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the PMBus interface.
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