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CRCW0402100KJNED

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CRCW0402100KJNED
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Vishay

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CRCW0402100KJNED Vishay Dale 也适用于 CRCW251297R6FKEG ,CRCW06033R90FKEA ,CRCW08053M09FKEA 等其余97个型号

参考设计

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Universal Digital Interface to Absolute Position Encoders Reference Design
TIDA-00179: The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor to run the master protocol. The design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.
Automotive ADAS Power Design Optimized for Xilinx® Zynq® 7010 SoC
TIDA-00389: The TIDA-00389 design is an optimized power solution for Xilinx® Zynq® 7010 FPGA/SoC (out of the Zynq® 7000 series family of products). It targets ADAS applications where customers opt to use FPGA instead of Multicore DSP or MPU. This design runs from a single intermediate 3.3V or 5V power supply rail and provides a complete solution to power the Xilinx® Zynq® 7010. DDR memory termination and a 5V supply for a CAN Transceiver are also implemented. A LM3880 provides power up and power down sequencing. The design is tested and optimized for automotive applications.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
PMP10520.3: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Automotive Power Reference Design for Low Power TDA3x Based Systems
TIDA-00530: This solution was designed to make an integrated, size-optimized power design for ADAS applications using the TDA3x SoC off of an automotive battery input. By targeting only applications with lower processing needs, we’re able to choose devices and components which are smaller, compared to systems utilizing higher performance processors.
USB-C DFP+ USB-A Power Bank with Input & Output Fast Charger Reference Design
PMP4451.1: This is a power bank reference design with a USB typc C DFP plus a USB type A port supporting high voltage discharging. Fast charger input is also supported to save more charging time. It can detect the input port attach/detach automatically, as well as the output ports.
USB-C DFP + 5V2A Power Bank With Input Fast Charger Reference Design
PMP11536: PMP11536 is a power bank reference design with a USB typc C DFP plus a USB type A port employing the boost mode of a Maxcharger. Fast charger input is also supported to save more charging time. It can detect the input port attach/detach events automatically, as well as the output ports.
Laptop/Notebook Computer Fan Controller Reference Design
TIDA-00578: This design uses a single-chip sensorless 3-phase brushless DC motor (BLDC) for driving fans quietly and smoothly. The 180 degree sinusoidal commutation sensorless algorithium is embedded inside of DRV10963, thus eliminating the need of software and firmware. DRV10963 is ideal for battery operated personal electronics & medical equipment due to low quiescent currents and low acoustics noise performance.
Power Cycling Reference Design to Extend Battery Life Using an Ultra-Low IQ LDO and Nano Timer
TIDA-00720: The TIDA-00720 reference design shows a method to extend battery life by power cycling. The power cycling concept consist in time interval period that enables the power management devices for just enough time for the microcontroller to execute the program, transmit data or collect data. Some of the MCUs have sleep modes with low stand-by currents, but the power management devices will continue to dissipate power if they are left enabled. The current leakage is higher during the enabled mode and will add up to the total power waste during the MCU sleep cycles. This design is ideal for systems that operate for various years without replacing the battery; these systems do not need to run constantly instead they operate in periodic intervals of seconds, minutes or even an hour in between operating time.
Interface to a Sin/Cos Encoder with Sitara AM437x Reference Design
TIDA-00178: The TIDA-00178 reference design is an EMC compliant industrial interface to Sin/Cos position encoders. Applications include industrial drives, which require accurate speed and position control. The design utilizes a 16-bit dual sample ADC with drop-in compatible 14- or 12-bit versions available, allowing for optimization of performance and cost. TIDA-00178 provides a direct connection to Sitara AM437x using SPI and QEP. For quick evaluation it features a 60-pin connector which directly fits the AM437x IDK. An example firmware for Sitara AM437x IDK is provided, which outputs the measured angle from the Sin/Cos encoder with up to 28-bit resolution through the Sitara’s USB virtual COM port.
WI-FI Power Strip/Energy Monitor Reference Design
TIDC-WIFI-METER-READING: The TIDC-WIFI-METER-READING TI Design adds Wi-Fi® communications to the TIDM-3OUTSMTSTRP smart power strip design. Wi-Fi connectivity is provided by the SimpleLink™ Wi-Fi CC32000 wireless MCU. A remote user can monitor the electricity consumption of the loads plugged into each of the three outlets and control a relay to switch power on/off. Smart power strips require connectivity to maximize their role in improving energy efficiency for applications such as data centers. The TIDM-BLE-MTR-READING TI Design offers another connectivity option.
Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus
PMP9408: The PMP9408 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. It utilizes a PMBus interface for current and voltage monitoring and meets Xilinx's low output voltage ripple requirement. This design uses a 5V input and offers a low cost discrete solution.
Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus
PMP9407: The PMP9407 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses two TPS544B20's which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
PMP10520.2: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Power Reference Design for Xilinx Ultrascale Kintex FPGA Multi-Gigabit Transciever (MGT) with PMBus
PMP9463: The PMP9463 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Ultrascale™ Kintex® FPGAs. It utilizes a PMBus interface for current and voltage monitoring and meets Xilinx's low output voltage ripple requirement. This design uses a 5V input and offers a low cost discrete solution.
Single Phase 60W Audio Amplifier Reference Design
PMP9372: PMP9372 is a single-phase synchronous boost converter, which utilizes the LM5121 controller. Inrush limiting is set to 11A nominal, which allows startup into a 4700μF output capacitor. The TPS3700DDC is used as an output voltage monitor, which provides Power Good signaling of output over-voltage and under-voltage.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution - PMP10520.3 - TI Tool Folder
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Reference Design - TPS54623 Synchronous Buck Converter with Vin=4.5V-17V, Vout=3.3V, Iout=5A
PMP10774: This synchronous buck converter design uses the TPS54623 to generate a 3.3V at 5A rail from a 4.5V-17Vdc source. The current mode control and high switching frequency of the device minimize the component count and size, resulting in a simple design. This supply achieves a peak efficiency of 96%.
Automotive Single-port USB Charging featuring LM43603 and TPS2543 Reference Design
PMP9080: Compact design for automotive single-port USB charging featuring the new synchronous 36V, 3A LM43603 SIMPLE SWITCHER and the TPS2543 USB Switch and Controller. LM2904 is used to provide cable droop compensation.
USB-C DFP+ USB-A Power Bank with Input & Output Fast Charger Reference Design
PMP4451.2: This is a power bank reference design with a USB typc C DFP plus a USB type A port supporting high voltage discharging. Fast charger input is also supported to save more charging time. It can detect the input port attach/detach automatically, as well as the output ports.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution with PMBus
PMP10520.1: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
USB-C DFP+ USB-A Power Bank with Input & Output Fast Charger Reference Design - PMP4451.1 - TI Tool Folder
PMP4451: This is a power bank reference design with a USB typc C DFP plus a USB type A port supporting high voltage discharging. Fast charger input is also supported to save more charging time. It can detect the input port attach/detach automatically, as well as the output ports.
Xilinx Virtex UltraScale FPGA Power Solution with PMBus Reference Design
PMP9475: The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in a compact, highly efficient design. This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of design/configuration and telemetry of critical rails. It features a UCD90120A for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the PMBus interface.
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