参考设计
(23)
Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design
PMP10601.1: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
LM3447 - 230VAC, 10W, Phase Dimmable Non-isolated Buck-Boost PFC LED Driver
PMP8025: The main purpose of this reference design is to demonstrate a high performance offline phase dimmable Buck-Boost PFC LED driver based on LM3447. This LED driver is designed for converting an AC input to a regulated LED current. The operating conditions and performance of the reference design are as follows:
Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design
PMP10601.2: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Ultrasonic Water Flow Meter Design using Time to Digital Conversion
TIDM-ULTRASONIC-FLOW-TDC: The TIDM-ULTRASONIC-FLOW-TDC is a reference design for an ultrasonic flow meter (water, gas or heat meter) with LCD built using a Time-to-Digital converter and an ultra-low power MCU. Solution includes optimized leakage detection, low power consumption, and a small form factor that are important requirements for water, heat and gas meter applications. This design also includes a high efficiency DC-DC converter for system power.
Xilinx(r) Ultrascale(r) 16nm FPGA/SoC Power Solution for Mobile Radio Basestation with PMBus
PMP10555: The PMP10555 reference design provides all the power supply rails necessary to power Xilinx® Ultrascale® 16nm family of FPGAs/SoCs in a mobile radio basestation application. This design uses a PMBus compatible 20A integrated FET buck converter for the core and two multi-output buck regulator ICs to provide the remaining supplies necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design
PMP10600.2: The PMP10600.2 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design
PMP10613.2: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design
PMP10613.1: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Altera® Stratix® V FPGA Power Solution
PMP9365: The PMP9365 reference design provides all the power supply rails necessary to power Altera's Stratix V family of FPGAs. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design
PMP10600.1: The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design - PMP10613.1 - TI Tool Folder
PMP10613: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
AM437x Discrete Power Reference Design
TIDEP0020: The Sitara AM437x simplified power sequence feature provides flexibility to power designers. This reference design implementation is a BOM-optimized discrete power solution for the AM437x processor with a minimal number of discrete ICs and basic feature set. The solution represents a baseline of a discrete power solution that can be extended for additional features and capabilities of the AM437x processor.