参考设计
(21)
Signal Processing Subsystem and Current Input Based Self Power for Breaker Applications (ACB/MCCB)
TIDA-00498: THe TIDA-00498 reference design features signal processing front-end and self-power block for electronic trip unit (ETU) used in circuit breakers. A FRAM based micro-controller is used for processing current inputs from signal conditioning amplifiers for 3-phase, neutral and ground current. Two gains are used to extend the range for phase current measurement. This reference design can also self-power using rectified current input. TIDA-00498 is desiged for fast and repeatable tripping (within 30mS) for wide current and temperature range.
Universal Digital Interface to Absolute Position Encoders Reference Design
TIDA-00179: The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor to run the master protocol. The design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.
Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design
PMP8930.5: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design
PMP8930.1: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
TIDA-01395 24-V AC Power Stage With Wide Vin Converter and Battery Gauge Reference Design for Smart Thermostat | TI.com
TIDA-01395: The TIDA-01395 TI Design provides a low BOM cost, high-efficiency power stage solution for smart thermostats, and other gateway building automation end quipment. This power stage takes a 24-V AC input and produces a 5-V and 3.3-V output rail, which can power additional point-of-load converters if added. The design provides LiPo battery charging and seamless switching to battery power during a 24-V AC brownout. The power-path capability provides battery power assistance allowing system load transient to exceed the current limit of the 24-V AC to DC system, allowing a lower cost wide Vin buck to be used. The battery fuel gauge helps designers preserve battery life and ensure proper operation by helping the central processor make smarter decisions on power saving and system functionality.
PMP8930 Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design | TI.com
PMP8930: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
TIDA-00550 Dual Channel-to-Channel Isolated Universal Analog Input Module for PLC Reference Design | TI.com
TIDA-00550: The TIDA-00550, dual channel-to-channel isolated universal analog input module reference design for programmable logic controllers (PLC), combines precision and flexibility. This TI Design used in conjunction with sensor transmitters can measure standard input voltages and currents as well as thermocouples, RTD and 4-20mA loops. With only four input terminals, it is suited for applications where smallest real-estate, high versatility and performance is required at the same time.
TIDA-00498 Signal Processing Subsystem and Current Input Based Self Power for Breaker Applications (ACB/MCCB) | TI.com
TIDA-00498: THe TIDA-00498 reference design features signal processing front-end and self-power block for electronic trip unit (ETU) used in circuit breakers. A FRAM based micro-controller is used for processing current inputs from signal conditioning amplifiers for 3-phase, neutral and ground current. Two gains are used to extend the range for phase current measurement. This reference design can also self-power using rectified current input. TIDA-00498 is desiged for fast and repeatable tripping (within 30mS) for wide current and temperature range.
Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design
PMP8930.4: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
PMP8930 Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design | TI.com
PMP8930: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
TIDA-00177 Two-Wire Interface to a HIPERFACE DSL Encoder Reference Design | TI.com
TIDA-00177: The TIDA-00177 reference design is an EMC compliant industrial interface to a two-wire HIPERFACE DSL encoder. Applications include industrial servo drives. The design features a 3.3-V supply RS485 transceiver and line termination and coupling for encoder power over RS485 as per HIPERFACE DSL specification. The design has been tested up to 100m cable length with an integrated cable, where the encoder’s two-wire twisted pair was integrated in the same motor cable. The encoder connector output is protected against over-voltage and short circuit to prevent damage to an encoder or during a cable short. The design features an industrial compliant 24-V input with wide range from 18-36V. A 3.3V I/O connector with logic signals for easy interface to a host processor with HIPERFACE DSL Master IP Core is made available.
Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design
PMP8930.2: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design
PMP8930.3: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
Inverter (-5.2V@4.5A) for RF Transponders
PMP3012: PMP3012 is a non-isolated boost inverter for RF transponders typically used in wireless applications. This design uses TPS40077 high efficiency synchronous buck controller for highly efficient operation typically greater than 90%. The design takes voltage inputs in the range of 10.5V to 13.5V and outputs -5.2V at 4.5A.
TIDA-00179 Universal Digital Interface to Absolute Position Encoders Reference Design | TI.com
TIDA-00179: The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor like Sitara AM437x or Delfino F28379 to run the corresponding master protocol. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). The TI design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.
PMP3012 Inverter (-5.2V@4.5A) for RF Transponders | TI.com
PMP3012: PMP3012 is a non-isolated boost inverter for RF transponders typically used in wireless applications. This design uses TPS40077 high efficiency synchronous buck controller for highly efficient operation typically greater than 90%. The design takes voltage inputs in the range of 10.5V to 13.5V and outputs -5.2V at 4.5A.
TIDA-00661 High Resolution, Fast Startup Analog Front End for Air Circuit Breaker Reference Design | TI.com
TIDA-00661: The TIDA-00661 reference design features signal processing front-end subsystem for electronic trip units (ETU) used in air circuit breakers (ACB) or molded case circuit breakers (MCCB). This subsystem consists of Delta-Sigma ADC with 24-Bit resolution and fast startup (< 3ms), ±2.5V regulator, FRAM-based microcontroller (MCU) for interfacing to ADC and processing the inputs. The subsystem is designed to start-up, compute full-cycle RMS current, make decisions, and provide trip signal to the solenoid within 30 ms.
TIDA-01167 Automotive 12V/24V Battery Input Protection Reference Design | TI.com
TIDA-01167: Automotive battery power supply lines are prone to transients while running the system. Typical protections required are overvoltage, overload, reverse polarity, and jump start. During the life of a car, the alternator may be replaced with a non-OEM part. The after-market alternator may have different or no load dump protection, which could lead to damaging the electronic control unit (ECU). This TI Design provides protection to handle these potential unsuppressed load dump pulses (12 V and 24 V) with hardware control. Class A operation may be attained during unsuppressed load dump pulses.
Primary-Side Regulated Flyback w/85-265VAC Input High Output Energy Storage Reference Design - PMP8930.1 - TI Tool Folder
PMP8930: The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
TIDA-01358 24-V AC Power Stage With Wide Vin Converter and Battery Backup Reference Design for Smart Thermostat | TI.com
TIDA-01358: The TIDA-01358 reference design provides a low BOM cost, high efficiency power stage solution for smart thermostats and other gateway building automation end equipment. This power stage takes a 24Vac input and produces a 5V and 3.3V output rail which can power additional point-of-load converters if added. The design provides LiPo battery charging and seamless switching to battery power during a 24Vac brownout. The power-path capability provides battery power assistance allowing system load transient to exceed the current limit of the 24Vac to DC system, allowing a lower cost Wide Vin buck to be utilized.
Two-Wire Interface to a HIPERFACE DSL Encoder Reference Design
TIDA-00177: The TIDA-00177 reference design is an EMC compliant industrial interface to a two-wire HIPERFACE DSL encoder. Applications include industrial servo drives. The design features a 3.3-V supply RS485 transceiver and line termination and coupling for encoder power over RS485 as per HIPERFACE DSL specification. The design has been tested up to 100m cable length with an integrated cable, where the encoder’s two-wire twisted pair was integrated in the same motor cable. The encoder connector output is protected against over-voltage and short circuit to prevent damage to an encoder or during a cable short. The design features an industrial compliant 24-V input with wide range from 18-36V. A 3.3V I/O connector with logic signals for easy interface to a host processor with HIPERFACE DSL Master IP Core is made available.
