TIDA-00431: Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies. This reference design describes a wideband RF receiver utilizing a 4-GSPS analog-to-digital converter (ADC), with an 8-GHz, DC-coupled, fully differential amplifier front end. The amplifier front end provides signal gain and allows capture of signals down to DC, which is not possible with a balun-coupled input.
TIDA-00432: This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown for each EVM. The FPGA firmware is described and the relevant Xilinx IP block configuration parameters are shown. Data taken on the actual hardware is shown and analyzed, showing synchronization within 50 ps without characterized cables or calibrated propagation delays.
TIDA-00359: Low cost, high performance clocking solution for GSPS data converters. This reference design discusses the use of a TRF3765, a low noise frequency synthesizer, generating the sampling clock for a 4 GSPS analog-to-digital converter (ADC12J4000). Experiments demonstrate data sheet comparable SNR and SFDR performance.