参考设计
(11)
Universal Digital Interface to Absolute Position Encoders Reference Design
TIDA-00179: The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor to run the master protocol. The design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.
Data Concentrator Reference Design
TIDEP0006: The data concentrator reference design gives developers the ultimate level of flexibility and scalability with numerous performance, cost and connectivity options for their data concentrator designs. It includes advanced hardware and software that reduce development time by up to nine months while still supporting connectivity to more than 1,000 smart meters. Developers can easily plug in different connectivity modules, including Sub-1GHz (LPRF), general packet radio service (GPRS), near field communication (NFC) and TI's power line communication (PLC) system-on-module robust G3 and PRIME support.
TIDEP0054 Parallel Redundancy Protocol (PRP) Ethernet Reference Design for Substation Automation | TI.com
TIDEP0054: This TI Design implements a solution for high-reliability, low-latency network communications for substation automation equipment in Smart Grid transmission and distribution networks. It supports the Parallel Redundancy Protocol (PRP) specification in the IEC 62439 standard using the PRU-ICSS. This solution is a lower-cost alternative to FPGA approaches and provides the flexibility and performance to add features such as IEC 61850 support without additional components.
TIDEP0006 Data Concentrator Reference Design | TI.com
TIDEP0006: The data concentrator reference design gives developers the ultimate level of flexibility and scalability with numerous performance, cost and connectivity options for their data concentrator designs. It includes advanced hardware and software that reduce development time by up to nine months while still supporting connectivity to more than 1,000 smart meters. Developers can easily plug in different connectivity modules, including Sub-1GHz (LPRF), general packet radio service (GPRS), near field communication (NFC) and TI's power line communication (PLC) system-on-module robust G3 and PRIME support.
TIDEP0043 Acontis EtherCAT Master Stack Reference Design | TI.com
TIDEP0043: The acontis EC-Master EtherCAT Master stack is a highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performance TI Sitara MPUs, it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT communication interface boards, EtherCAT based PLC or motion control applications. The EC-Master architectural design does not require additional tasks to be scheduled, thus the full stack functionality is available even on an OS less platform such as TI Starterware suported on AM335x. Due to this architecture combined with the high speed Ethernet driver it is possible to implement EtherCAT master based applications on the Sitara platform with short cycle times of 100 microseconds or even below.
TIDA-01226 Compact Full HD 1080p (up to 16 Amps) Projection Display Reference Design Using DLP Pico Technology | TI.com
TIDA-01226: This reference design, featuring the DLP Pico™ 0.47-inch TRP Full-HD 1080p display chipset and implemented in the DLP LightCrafter Display 4710 G2 evaluation module (EVM), enables use of full HD resolution for projection display applications such as accessory projectors, screenless displays, interactive displays, wearables (including head mounted displays), signage, industrial and medical displays. The chipset used in the design is comprised of the DLP4710 (.47 1080p) DMD, the DLPC3439 display controller and the DLPA3005 PMIC/LED driver.
TIDEP0057 Multi-Protocol Digital Position Encoder Master Interface Reference Design With AM437x on PRU-ICSS | TI.com
TIDEP0057: TI provides the system solution for Industrial Communication on Sitara™ processors with Programmable Real-Time Unit and Industrial Communication Subsystem (PRU-ICSS). This TI Design describes the integrated multi-protocol digital position encoder master interface support. The supported digital position encoder master protocols are EnDat 2.2, Hiperface DSL ® and BiSS C. The integrated multi-protocol encoder master has the benefit to work without additional field programmable gate array (FPGA), application specific integrated circuit (ASIC) and programmable logic device (PLD) while support multiple of the encoder protocols - therefore it saves cost and reduces board space. This reference design utilizes the Single Chip Drive Evaluation Board (TMDSIDK437X ) and Universal Digital Interface to Absolute Position Encoders Reference Design (TIDA-00179).
TIDEP0059 G3-PLC (CENELEC Band) Data Concentrator Reference Design | TI.com
TIDEP0059: The TIDEP0059 reference design implements a complete Power Line Communications (PLC) Data Concentrator based upon the G3-PLC industry standard. It operates in the 36 kHz – 91 kHz band defined by the CENELEC for Smart Grid communications. The reference design includes G3-PLC software which supports the management of up to 1000 G3-PLC end points in a neighborhood area network. The reference design supports the full 312 Kbps data throughput specified by the G3-PLC standard.
TIDEP0058 G3-PLC (FCC Band) Data Concentrator Reference Design | TI.com
TIDEP0058: The TIDEP0058 reference design implements a complete Power Line Communications (PLC) Data Concentrator based upon the G3-PLC industry standard. It operates in the 157 kHz – 487 kHz band defined by the FCC for Smart Grid communications. The reference design includes G3-PLC software which supports the management of up to 1000 G3-PLC end points in a neighborhood area network. The reference design supports the full 312 Kbps data throughput specified by the G3-PLC standard.
TIDA-00179 Universal Digital Interface to Absolute Position Encoders Reference Design | TI.com
TIDA-00179: The TIDA-00179 reference design is an EMC compliant universal digital interface to connect to absolute position encoders, like EnDat 2.2, BiSS®, SSI or HIPERFACE DSL®. The design supports a wide input voltage range from 15-60V (24V nom). A connector with 3.3V logic I/O signals allows for direct interface to the host processor like Sitara AM437x or Delfino F28379 to run the corresponding master protocol. Master implementations are available on Sitara AM437x (EnDat2.2, BiSS and HIPERFACE DSL) or Delfino DesignDRIVE (EnDat2.2 and BiSS). The TI design allows the host processor to select between a 4-wire encoder interface like EnDat 2.2 and BiSS or a 2-wire interface with power over RS485 like HIPERFACE DSL. To meet the selected encoder's supply range, the design offers a programmable output voltage with either 5.25V or 11V. This design’s power supply offers protection against over-voltage and short circuit according to the selected encoder’s voltage range to prevent damage during a cable short. TIDA-00179 has been tested up to 100m cable length with EnDat 2.2 and 2-wire HIPERFACE DSL encoders.
Acontis EtherCAT Master Stack Reference Design
TIDEP0043: The acontis EC-Master EtherCAT Master stack is a highly portable software stack that can be used on various embedded platforms. The EC-Master supports the high performane TI Sitara MPUs, it provides a sophisticated EtherCAT Master solution which customers can use to implement EtherCAT communication interface boards, EtherCAT based PLC or motion control applications. The EC-Master architectural design does not require additional tasks to be scheduled, thus the full stack functionality is available even on an OS less platform such as TI Starterware suported on AM335x. Due to this architecture combined with the high speed Ethernet driver it is possible to implement EtherCAT master based applications on the Sitara platform with short cycle times of 100 microseconds or even below.
