参考设计
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Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
PMP10520.3: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP20080 12VDC Input, Hybrid Memory Cube (HMC) Gen. 2 Power Supply Reference Design | TI.com
PMP20080: The PMP20080 is a powerful design intended to operate 5 output rails with application to a Hybrid Memory Cube (HMC) Gen2. This design uses 5 synchronous bucks with multiple different controllers to allow for a well regulated set of outputs. Also, PMP20080 allows for the configurability that comes along with PMBus. The PMP20080 reference design has been designed entirely with standard components.
PMP10555 Xilinx(r) Ultrascale(r) 16nm FPGA/SoC Power Solution for Mobile Radio Basestation with PMBus | TI.com
PMP10555: The PMP10555 reference design provides all the power supply rails necessary to power Xilinx® Ultrascale® 16nm family of FPGAs/SoCs in a mobile radio basestation application. This design uses a PMBus compatible 20A integrated FET buck converter for the core and two multi-output buck regulator ICs to provide the remaining supplies necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
PMP9407 Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus | TI.com
PMP9407: The PMP9407 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses two TPS544B20's which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP10520 Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution | TI.com
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Xilinx(r) Ultrascale(r) 16nm FPGA/SoC Power Solution for Mobile Radio Basestation with PMBus
PMP10555: The PMP10555 reference design provides all the power supply rails necessary to power Xilinx® Ultrascale® 16nm family of FPGAs/SoCs in a mobile radio basestation application. This design uses a PMBus compatible 20A integrated FET buck converter for the core and two multi-output buck regulator ICs to provide the remaining supplies necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus
PMP9407: The PMP9407 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses two TPS544B20's which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
PMP10520.2: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP9475 Xilinx Virtex UltraScale FPGA Power Solution with PMBus Reference Design | TI.com
PMP9475: The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in a compact, highly efficient design. This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of design/configuration and telemetry of critical rails. It features a UCD90120A for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the PMBus interface.
PMP9008 1V @ 30A Integrated FET with PMBus Reference Design | TI.com
PMP9008: PMP9008 is designed using the TPS544C20 to generate low voltage point of load outputs up to 30A. The design is a very compact form factor sync buck with integrated FETs. The controller also offers PMBus comands for telemetry and monitoring. The efficieny is over 85% for almost the entire load range. DCap control makes the compensation easy and the transient response very fast.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution - PMP10520.3 - TI Tool Folder
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP10520 Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution | TI.com
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution with PMBus
PMP10520.1: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
1V @ 30A Integrated FET with PMBus Reference Design
PMP9008: PMP9008 is designed using the TPS544C20 to generate low voltage point of load outputs up to 30A. The design is a very compact form factor sync buck with integrated FETs. The controller also offers PMBus comands for telemetry and monitoring. The efficieny is over 85% for almost the entire load range. DCap control makes the compensation easy and the transient response very fast.
Xilinx Virtex UltraScale FPGA Power Solution with PMBus Reference Design
PMP9475: The PMP9475 12V-input reference design provides all the power supply rails necessary to power Xilinx's Virtex® UltraScale™ family of FPGAs in a compact, highly efficient design. This design uses several of TI's PMBus Point-Of-Load voltage regulators for ease of design/configuration and telemetry of critical rails. It features a UCD90120A for flexible power up and power down sequencing as well as voltage monitoring, current monitoring, and voltage margining through the PMBus interface.
