参考设计
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TIDA-00254 Accurate Point Cloud Generation for 3D Machine Vision Applications using DLP® Technology | TI.com
TIDA-00254: The 3D Machine Vision reference design employs Texas Instruments DLP® Advanced Light Control Software Development Kit (SDK) for LightCrafter™ series controllers, which allows developers to easily construct 3D point clouds by integrating TI’s digital micromirror device (DMD) technology with cameras, sensors, motors or other peripherals. The highly differentiated 3D Machine Vision system utilizes the DLP® LightCrafter™ 4500 evaluation module (EVM), featuring the DLP4500 WXGA chipset, and enables flexible control of high resolution, accurate patterns for industrial, medical, and security applications.
PMP4854-2 TPS54620 Reference Design Optimized for Small Size | TI.com
PMP4854-2: This reference design contains two different schematics using the TPS54620 DC/DC converter on one print. Both designs accept a 4.5V to 14V input and deliver 6-A at an output voltage of 3.3V while switching at 580 kHz. PMP4854-1 is designed for fast transient response and uses a 3.3uH VLF10045T inductor with two 47uF 1206 ceramic output capacitors. PMP4854-2 is designed to minimize board space. The entire design occupies only 195 square millimeters and uses a 3.3 uH IHLP2525 inductor with only one 47uF 1206 ceramic output capacitor. The TPS54620 is a 4.5 to 17V, 6-A monolithic synchronous buck 1.6 MHz DC/DC converter with integrated 26 / 19 milliohm MOSFETS in a small 3.5mm x 3.5mm 14 pin QFN package.
High Resolution, Portable Light Steering Reference Design using DLP Technology
DLP4500-C350REF: This reference design, featuring the DLP® 0.45” WXGA chipset and implemented in the DLP® LightCrafter™ 4500 evaluation module (EVM), enables flexible control of high resolution, accurate patterns for industrial, medical, and scientific applications. With a free USB-based GUI and API, developers can easily integrate TI’s innovative digital micromirror device (DMD) technology with cameras, sensors, motors, and other peripherals to create highly differentiated 3D machine vision systems, 3D printers, and augmented reality displays.
DLP4500-C350REF High Resolution, Portable Light Steering Reference Design using DLP Technology | TI.com
DLP4500-C350REF: This reference design, featuring the DLP® 0.45” WXGA chipset and implemented in the DLP® LightCrafter™ 4500 evaluation module (EVM), enables flexible control of high resolution, accurate patterns for industrial, medical, and scientific applications. With a free USB-based GUI and API, developers can easily integrate TI’s innovative digital micromirror device (DMD) technology with cameras, sensors, motors, and other peripherals to create highly differentiated 3D machine vision systems, 3D printers, and augmented reality displays.
Data Concentrator Reference Design
TIDEP0006: The data concentrator reference design gives developers the ultimate level of flexibility and scalability with numerous performance, cost and connectivity options for their data concentrator designs. It includes advanced hardware and software that reduce development time by up to nine months while still supporting connectivity to more than 1,000 smart meters. Developers can easily plug in different connectivity modules, including Sub-1GHz (LPRF), general packet radio service (GPRS), near field communication (NFC) and TI's power line communication (PLC) system-on-module robust G3 and PRIME support.
Altera Arria V GZ FPGA Discrete Power Solution Reference Design
PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
PMP5495 PMP5495 Reference Design for Reduced Board Space | TI.com
PMP5495: The PMP5495 reference design contains the TPS54620 DC/DC converter with a double-sided layout to reduce board space. The reference design accepts a 4.5V to 17V input and delivers up to 5A at an output voltage of 3.3V while switching at 480 kHz. The reference design takes up less than 185 square millimeters total board area and uses a 3.3µH IHLP2525 inductor with only one 47µF 1206 ceramic output capacitor. The TPS54620 is a 4.5 to 17V, 6-A monolithic synchronous buck DC/DC converter with integrated 26 / 19 milliohm MOSFETS in a small 3.5mm x 3.5mm 14-pin QFN package.
Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution
TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
PMP7396 '3.3V input; Synchronous Inverter; -5.2V 1.75A Output | TI.com
PMP7396: The PMP7396 reference design uses TPS54620 to power a Synchronous Inverter. Both FETs are internal to the TPS54620. This can replace older designs with external FETs. Electrical and Thermal test results shown for 3-3.6Vin -5.2Vout at up to 1.8A. An on board dynamic load allows rapid load transients to be tested. The REG710 charge pump provides the needed 5V bias to run the TPS54620.
TIDEP0006 Data Concentrator Reference Design | TI.com
TIDEP0006: The data concentrator reference design gives developers the ultimate level of flexibility and scalability with numerous performance, cost and connectivity options for their data concentrator designs. It includes advanced hardware and software that reduce development time by up to nine months while still supporting connectivity to more than 1,000 smart meters. Developers can easily plug in different connectivity modules, including Sub-1GHz (LPRF), general packet radio service (GPRS), near field communication (NFC) and TI's power line communication (PLC) system-on-module robust G3 and PRIME support.
PMP5495 Reference Design for Reduced Board Space
PMP5495: The PMP5495 reference design contains the TPS54620 DC/DC converter with a double-sided layout to reduce board space. The reference design accepts a 4.5V to 17V input and delivers up to 5A at an output voltage of 3.3V while switching at 480 kHz. The reference design takes up less than 185 square millimeters total board area and uses a 3.3µH IHLP2525 inductor with only one 47µF 1206 ceramic output capacitor. The TPS54620 is a 4.5 to 17V, 6-A monolithic synchronous buck DC/DC converter with integrated 26 / 19 milliohm MOSFETS in a small 3.5mm x 3.5mm 14-pin QFN package.
TPS54620 Reference Design Optimized for Small Size
PMP4854-2: This reference design contains two different schematics using the TPS54620 DC/DC converter on one print. Both designs accept a 4.5V to 14V input and deliver 6-A at an output voltage of 3.3V while switching at 580 kHz. PMP4854-1 is designed for fast transient response and uses a 3.3uH VLF10045T inductor with two 47uF 1206 ceramic output capacitors. PMP4854-2 is designed to minimize board space. The entire design occupies only 195 square millimeters and uses a 3.3 uH IHLP2525 inductor with only one 47uF 1206 ceramic output capacitor. The TPS54620 is a 4.5 to 17V, 6-A monolithic synchronous buck 1.6 MHz DC/DC converter with integrated 26 / 19 milliohm MOSFETS in a small 3.5mm x 3.5mm 14 pin QFN package.
TIDEP0059 G3-PLC (CENELEC Band) Data Concentrator Reference Design | TI.com
TIDEP0059: The TIDEP0059 reference design implements a complete Power Line Communications (PLC) Data Concentrator based upon the G3-PLC industry standard. It operates in the 36 kHz – 91 kHz band defined by the CENELEC for Smart Grid communications. The reference design includes G3-PLC software which supports the management of up to 1000 G3-PLC end points in a neighborhood area network. The reference design supports the full 312 Kbps data throughput specified by the G3-PLC standard.
PMP6776 Xilinx Kintex FPGA Power Solution | TI.com
PMP6776: PMP6776 is a low-cost non-isolated synchronous buck power supply. This design uses TPS56121 and TPS54620 Synchronous Buck Converters and TPS54425 and TPS54225 Step-Down Switchers to generate 7 outputs. Features include input voltage range 10.8V to 13.2V and outputs 1V at 6A, 1.5V at 4A, 1.8V at 6A, 2V at 2A, 2.5V at 8A, 3.3V at 8A, 1.2V at 4A.
1.2V,4A
PMP5613.1: PMP5613 is a power solution for set top boxes generating several output voltages from a 11-13V input.
TIDEP0058 G3-PLC (FCC Band) Data Concentrator Reference Design | TI.com
TIDEP0058: The TIDEP0058 reference design implements a complete Power Line Communications (PLC) Data Concentrator based upon the G3-PLC industry standard. It operates in the 157 kHz – 487 kHz band defined by the FCC for Smart Grid communications. The reference design includes G3-PLC software which supports the management of up to 1000 G3-PLC end points in a neighborhood area network. The reference design supports the full 312 Kbps data throughput specified by the G3-PLC standard.
Reference Design for Telecom Applications (24V @ 0.5A)
PMP4742.2: PMP4742.2 is a simple and efficient non synchronous boost converter. It boosts the input 12V to 24V at 150mA nominal, 500mA maximum. Its enable pin is driven by power good signal from the hot swap TPS2420.
TIDEP0067 66AK2G02 DSP + ARM Processor Power Solution Reference Design | TI.com
TIDEP0067: The TIDEP0067 TI Reference Design is based on the 66AK2G02 multicore System-on-Chip (SoC) processor and companion TPS659118 power management integrated circuit (PMIC) which includes power supplies and power sequencing for the 66AK2G02 processor in a single device. This power solution design also includes the first stage buck converters to support a 12 V input and the DDR termination regulator for DDR3L memory. The reference design is tested and includes hardware reference (EVM), software (Processor SDK) and test data.
TPS54620 - 3.3V @ 4.0A
PMP5613.4: PMP5613 is a power solution for settop boxes generating several output voltages from a 11-13V input.
PMP9357 Altera Arria V FPGA Power Supply Reference Design | TI.com
PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
5-12V input; Synchronous Inverter; -5.2V 2.5-3.8A Output
PMP7395: The PMP7395 reference design uses TPS54620 to power a Synchronous Inverter. Both FETs are internal to the TPS54620. This can replace older designs with external FETs. Electrical and Thermal test results shown for 5Vin -5.2Vout at up to 2.5A out and 12Vin -5.2Vout at up to 3.8A. An on board dynamic load allows rapid load transients to be tested.
TIDEP0036 Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution | TI.com
TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
PMP9357 Altera Arria V FPGA Power Supply Reference Design | TI.com
PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
'3.3V input; Synchronous Inverter; -5.2V 1.75A Output
PMP7396: The PMP7396 reference design uses TPS54620 to power a Synchronous Inverter. Both FETs are internal to the TPS54620. This can replace older designs with external FETs. Electrical and Thermal test results shown for 3-3.6Vin -5.2Vout at up to 1.8A. An on board dynamic load allows rapid load transients to be tested. The REG710 charge pump provides the needed 5V bias to run the TPS54620.
TPS54620 Reference Design for Fast Transient Response
PMP4854-1: This reference design contains two different schematics using the TPS54620 DC/DC converter on one print. Both designs accept a 4.5V to 14V input and deliver 6-A at an output voltage of 3.3V while switching at 580 kHz. PMP4854-1 is designed for fast transient response and uses a 3.3uH VLF10045T inductor with two 47uF 1206 ceramic output capacitors. PMP4854-2 is designed to minimize board space. The entire design occupies only 195 square millimeters and uses a 3.3 uH IHLP2525 inductor with only one 47uF 1206 ceramic output capacitor. The TPS54620 is a 4.5 to 17V, 6-A monolithic synchronous buck 1.6 MHz DC/DC converter with integrated 26 / 19 milliohm MOSFETS in a small 3.5mm x 3.5mm 14 pin QFN package.
PMP4854-1 TPS54620 Reference Design for Fast Transient Response | TI.com
PMP4854-1: This reference design contains two different schematics using the TPS54620 DC/DC converter on one print. Both designs accept a 4.5V to 14V input and deliver 6-A at an output voltage of 3.3V while switching at 580 kHz. PMP4854-1 is designed for fast transient response and uses a 3.3uH VLF10045T inductor with two 47uF 1206 ceramic output capacitors. PMP4854-2 is designed to minimize board space. The entire design occupies only 195 square millimeters and uses a 3.3 uH IHLP2525 inductor with only one 47uF 1206 ceramic output capacitor. The TPS54620 is a 4.5 to 17V, 6-A monolithic synchronous buck 1.6 MHz DC/DC converter with integrated 26 / 19 milliohm MOSFETS in a small 3.5mm x 3.5mm 14 pin QFN package.
Accurate Point Cloud Generation for 3D Machine Vision Applications using DLP® Technology
TIDA-00254: The 3D Machine Vision reference design employs Texas Instruments DLP Software Development Kit (SDK) allowing developers to easily construct 3D point clouds by integrating TI’s digital micromirror device (DMD) technology with cameras, sensors, motors or other peripherals. The highly differentiated 3D Machine Vision systems utilizes the DLP® LightCrafter™ 4500 evaluation module (EVM), featuring the DLP® 0.45” WXGA chipset, and enables flexible control of high resolution, accurate patterns for industrial, medical, and security applications.
Reference Design for Telecom Applications (12V @ 1.1A)
PMP4742.1: PMP4742.1 comprises a negative input (-10.8V to -13.2V) to positive output (12V@1A average) inverting buck-boost converter with TPS40210; a hot swap circuit with TPS2420 quickly limits the output current to 2A peak.
Reference Design for Telecom Applications (3.3V @ 5A)
PMP4742.3: PMP4742.3 protects the 12Vin by means of hot swap controller (TPS2420) and feeds a TPS54620, syncronous buck converter, which generates 3.3V@3.7A. An INA210 reads the buck's current for monitoring purposes.
Xilinx Kintex FPGA Power Solution
PMP6776: PMP6776 is a low-cost non-isolated synchronous buck power supply. This design uses TPS56121 and TPS54620 Synchronous Buck Converters and TPS54425 and TPS54225 Step-Down Switchers to generate 7 outputs. Features include input voltage range 10.8V to 13.2V and outputs 1V at 6A, 1.5V at 4A, 1.8V at 6A, 2V at 2A, 2.5V at 8A, 3.3V at 8A, 1.2V at 4A.
TIDEP0081 Wideband Receiver Design Using 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design | TI.com
TIDEP0081: For wideband receiver system developers currently using FPGA or ASIC to connect High Speed data converters to a baseband processor, who need faster time to market with increased performance and significant reduction in cost, power, and size. This reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End Processing (DFE). Connecting ADC32RF80 to DAC38J84 provides an efficient solution for avionics and defense, test and measurements and industrial applications.
PMP7395 5-12V input; Synchronous Inverter; -5.2V 2.5-3.8A Output | TI.com
PMP7395: The PMP7395 reference design uses TPS54620 to power a Synchronous Inverter. Both FETs are internal to the TPS54620. This can replace older designs with external FETs. Electrical and Thermal test results shown for 5Vin -5.2Vout at up to 2.5A out and 12Vin -5.2Vout at up to 3.8A. An on board dynamic load allows rapid load transients to be tested.
