PMP5863.4: The negative-voltage TPS7A3001 LDO, when paired with the positivevoltage TPS7A4901 LDO, provides designers with a total solution for powering precision analog applications. These LDOs feature ultra-high PSRR performance with output noise as low as 16 µVrms and are designed to power noise-sensitive applications such as op amps, ADCs, DACs and other high-performance analog circuitry.

PMP5863.2: The negative-voltage TPS7A3001 LDO, when paired with the positivevoltage TPS7A4901 LDO, provides designers with a total solution for powering precision analog applications. These LDOs feature ultra-high PSRR performance with output noise as low as 16 µVrms and are designed to power noise-sensitive applications such as op amps, ADCs, DACs and other high-performance analog circuitry.

PMP5863.1: The negative-voltage TPS7A3001 LDO, when paired with the positivevoltage TPS7A4901 LDO, provides designers with a total solution for powering precision analog applications. These LDOs feature ultra-high PSRR performance with output noise as low as 16 µVrms and are designed to power noise-sensitive applications such as op amps, ADCs, DACs and other high-performance analog circuitry.

PMP5863: The negative-voltage TPS7A3001 LDO, when paired with the positivevoltage TPS7A4901 LDO, provides designers with a total solution for powering precision analog applications. These LDOs feature ultra-high PSRR performance with output noise as low as 16 µVrms and are designed to power noise-sensitive applications such as op amps, ADCs, DACs and other high-performance analog circuitry.

TIDA-00181: This reference design provides isolated positive and negative voltage rails required for Insulated Gate Bipolar Transistor (IGBT) gate drivers from a single 24-volt DC input supply. IGBTs are used in three phase inverters for variable-frequency drives to control the speed of AC motors. This reference design uses a push-pull isolated control topology and provides isolation compliant to IEC61800-5 and is intended to operate from a pre-regulated 24Vdc input. With a regulated (within 5%) input source, a simple open-loop, free-running oscillator can be implemented with a push-pull PWM controller. This topology is essentially a forward converter with two primary windings used to create a dual-drive winding. This fully utilizes the transformer core's magnetizing current more efficiently than flyback or the forward topologies. Another advantage this configuration has over flyback and forward configurations is that the supply output can be scaled up for higher power drives. This reference design also takes advantage of another benefit of the push pull topology in that multiple transformers can be controlled in parallel from a single controller to generate all the isolated voltage rails required for 3-phase IGBT inverters. Lastly, larger IGBTs for higher power drives sometimes require more gate drive current than what is provided by a typical IGBT gate driver, for which designers often use additional transistors for gate current boosting. This reference design provides +16V on the positive outputs and -8V on the negative outputs to compensate for the added voltage drop in those transistors.

TIDA-00182: This reference design provides reinforced isolated positive and negative voltage rails required for Insulated Gate Bipolar Transistor (IGBT) gate drivers from a single 24-volt DC input supply. Utilizing a flyback isolated control topology, this reference design provides isolation compliant to IEC61800-5, and generates power rails for all three arms of the 3-phase inverter from a single transformer. The output power is currently set at 2W/IGBT but can be scaled up for higher power IGBTs by changing the transformer design.

PMP5863.3: The negative-voltage TPS7A3001 LDO, when paired with the positivevoltage TPS7A4901 LDO, provides designers with a total solution for powering precision analog applications. These LDOs feature ultra-high PSRR performance with output noise as low as 16 µVrms and are designed to power noise-sensitive applications such as op amps, ADCs, DACs and other high-performance analog circuitry.

TIPD167: This TI Verified Design provides the theory, component selection, TINA-TI simulations, Verification & Measurement Performance, Altium Schematics, PCB Layout for a Phase Compensated 8-Ch Multiplexed Data Acquisition System for Power Automation. The design uses a 16-bit, 8-Channel, 500ksps SAR ADC, ADS8688 with integrated analog front-end circuit for ease of system hardware design. The design introduces the concept of phase and phase Compensation, compares the additional phase delay introduced between the input channels of a non-simultaneous sampling ADC with a simultaneous sampling ADC, and provides a optimal algorithm to compensate for the phase delay introduced in a non-simultaneous implementation. Measured results demonstrate how the phase compensation algorithm used in this design compensates for the additional phase delay introduced by a multiplexed ADC, resulting in an equivalent performing solution as compared to a simultaneous sampling ADC solution.