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首页 > 电子元器件选型 > 过滤器 > 数据线路滤波器 > BLM21AG102SN1D 详情
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BLM21AG102SN1D

BLM21AG102SN1D
已加入BOM:

BLM21AG102SN1D
已加入 Default List -

Ferrite Chip, 1 Function(s), 0.5A, 2 Pin(s)
制造商:
muRata(村田)
制造商型号:
BLM21AG102SN1D
符合标准:
Rohs 符合    不含铅
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BLM21AG102SN1D数据表
参考设计(13)
Altera Arria V FPGA Power Supply Reference Design - PMP9357.1 - TI Tool Folder
PMP9357: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
Altera Arria V GZ FPGA Discrete Power Solution Reference Design
PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
Altera Arria V GX FPGA Power Solution Reference Design
PMP9449: The PMP9449 reference design provides all the power supply rails necessary to power Altera's Arria® V GX family of FPGAs. It utilizes a TPS38600 to monitor the input supply and provide power on sequencing. This design features low cost, small footprint discrete ICs and is powered from a single 5V input.
Altera Arria V FPGA Power Supply Reference Design
PMP9357.1: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
Altera Arria V FPGA Power Supply Reference Design
PMP9357.2: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
Altera Arria V FPGA Power Supply Reference Design - PMP9357.2 - TI Tool Folder
PMP9357: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
Altera Arria V FPGA Power Supply Reference Design
PMP9357.5: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
FPGA Firmware Project for Measuring Bit Errors in the Output Word of an A to D Converter
TIDA-00070: For applications where there are bit errors and resulting sample errors (also called sparkle codes, word errors, or code errors), the ability to measure the Error rates caused by these bit errors is important. This FPGA firmware based application note proposes a method to accurately measure these errors over an indefinite time and provides an example of how this measurement can be done using a simple FPGA platform. Code is available on request for the two examples described in the application note.
Altera Arria V FPGA Power Supply Reference Design
PMP9357.6: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
Synchronizing Multiple JESD204B ADCs for Emitter Position Location Reference Design
TIDA-00467: A common technique to estimate the position of emitters uses the amplitude and phase shift data of a signal derived from an array of spatially distributed sensors. For such systems, it is important to guarantee a deterministic phase relationship between the sensors to minimize errors in the actual measured data. This application design will discuss how multiple Analog to Digital Converters (ADCs) with a JESD204B interface can be synchronized so that the sampled data from the ADCs are phase aligned.
Altera Arria V FPGA Power Supply Reference Design
PMP9357.4: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
Altera Arria V FPGA Power Supply Reference Design
PMP9357.3: This reference design provides all the power supply rails necessary to power Altera's Arria V FPGA. This design uses the TPS54620 to generate the rails to power the FPGA.
High Perf Single Ended to Diff Active Interface for High Speed ADC Developed by Dallas Logic Corp : Dallas Logic Corporation
TIDA-00294: This reference design uses the ADC34J22 12b 50Msps JESD204B data converter and the THS4541 fully differential amplifer to demonstrate how to design a high performance active interface for high speed ADCs. This type of circuit can be used in sensor front end, motor control, and test and measurement applications. The circuit model and derivation of the design equations is presented along with the actual implementation on a PCB. Results of this implementation are presented to show very similar performance as compared to a passive AC coupled transformer interface.
Rutronik
分销商编号:
FE1028
交货地:
中国大陆
港台地区
单价:
  • 阶梯 人民币价格(含税) 美元价格
  • 4000+ ¥0.2319 $0.0301
  • 8000+ ¥0.2088 $0.0271
  • 12000+ ¥0.2072 $0.0269
  • 16000+ ¥0.2049 $0.0266
  • 20000+ ¥0.2011 $0.0261
更多价格
请输入数量:
-+
总计:
库存/包装:
576,000 / Tape & Reel
起订量:
4,000
递增量:
4,000
原厂交货期:
In Stock
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