更多产品参数
Power Management Circuit, CMOS, PDSO6
制造商:
Texas Instruments
制造商型号:
LM3880MF-1AC/NOPB
符合标准:
Rohs 符合
数据手册:
文档下载
LM3880MF-1AC/NOPB数据表
参考设计(71)
PMP9463 Power Reference Design for Xilinx Ultrascale Kintex FPGA Multi-Gigabit Transciever (MGT) with PMBus | TI.com
PMP9463: The PMP9463 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Ultrascale™ Kintex® FPGAs. It utilizes a PMBus interface for current and voltage monitoring and meets Xilinx's low output voltage ripple requirement. This design uses a 5V input and offers a low cost discrete solution.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.5: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.7: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design
PMP10601.1: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
PMP10601 Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design | TI.com
PMP10601: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Altera Cyclone V SoC Power Supply Reference Design - PMP9353.7 - TI Tool Folder
PMP9353: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
PMP9408 Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus | TI.com
PMP9408: The PMP9408 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. It utilizes a PMBus interface for current and voltage monitoring and meets Xilinx's low output voltage ripple requirement. This design uses a 5V input and offers a low cost discrete solution.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.8: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design - PMP10630.5 - TI Tool Folder
PMP10630: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
PMP10652 System-Level Reference Design for 30W ADAS System With Required Automotive Protections | TI.com
PMP10652: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
PMP10520.3: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP10601 Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design | TI.com
PMP10601: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design
PMP10601.2: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx® Zynq® 7000 series (XC7Z015) Power Solution, 8W - Reference Design - PMP10601.1 - TI Tool Folder
PMP10601: The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.2: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.2: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
PMP10613 Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design | TI.com
PMP10613: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.5: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
PMP10555 Xilinx(r) Ultrascale(r) 16nm FPGA/SoC Power Solution for Mobile Radio Basestation with PMBus | TI.com
PMP10555: The PMP10555 reference design provides all the power supply rails necessary to power Xilinx® Ultrascale® 16nm family of FPGAs/SoCs in a mobile radio basestation application. This design uses a PMBus compatible 20A integrated FET buck converter for the core and two multi-output buck regulator ICs to provide the remaining supplies necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
PMP9407 Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus | TI.com
PMP9407: The PMP9407 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses two TPS544B20's which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.1: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
PMP10613 Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design | TI.com
PMP10613: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
PMP10520 Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution | TI.com
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Xilinx(r) Ultrascale(r) 16nm FPGA/SoC Power Solution for Mobile Radio Basestation with PMBus
PMP10555: The PMP10555 reference design provides all the power supply rails necessary to power Xilinx® Ultrascale® 16nm family of FPGAs/SoCs in a mobile radio basestation application. This design uses a PMBus compatible 20A integrated FET buck converter for the core and two multi-output buck regulator ICs to provide the remaining supplies necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
PMP10630 Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design | TI.com
PMP10630: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
PMP10652 System-Level Reference Design for 30W ADAS System With Required Automotive Protections | TI.com
PMP10652: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.6: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.1: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Cyclone V SoC Power Supply Reference Design - PMP9353.1 - TI Tool Folder
PMP9353: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.9: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.5: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
System Level reference design for 30W ADAS system with required Automotive Protections - PMP10652.2 - TI Tool Folder
PMP10652: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus
PMP9408: The PMP9408 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. It utilizes a PMBus interface for current and voltage monitoring and meets Xilinx's low output voltage ripple requirement. This design uses a 5V input and offers a low cost discrete solution.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.4: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design
PMP10600.2: The PMP10600.2 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design - PMP10630.7 - TI Tool Folder
PMP10630: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.6: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Xilinx Virtex Ultrascale FPGA Multi-Gigabit Transceiver (MGT) Power Reference Design with PMBus
PMP9407: The PMP9407 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses two TPS544B20's which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.1: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design - PMP10600.1 - TI Tool Folder
PMP10600: The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
PMP9353 Altera Cyclone V SoC Power Supply Reference Design | TI.com
PMP9353: The PMP9353 reference design is a complete power solution for Altera Cyclone V SoC devices. This design uses several LMZ3 series modules , two LDOs, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power-up sequencing.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.4: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.6: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design
PMP10613.2: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.3: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution
PMP10520.2: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP9365 Altera® Stratix® V FPGA Power Solution | TI.com
PMP9365: The PMP9365 reference design provides all the power supply rails necessary to power Altera's Stratix V family of FPGAs. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design
PMP10613.1: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Altera® Stratix® V FPGA Power Solution
PMP9365: The PMP9365 reference design provides all the power supply rails necessary to power Altera's Stratix V family of FPGAs. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features two LM3880's for flexible power up and power down sequencing. This design uses a 12V input.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.2: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
Power Reference Design for Xilinx Ultrascale Kintex FPGA Multi-Gigabit Transciever (MGT) with PMBus
PMP9463: The PMP9463 reference design provides all the power supply rails necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Ultrascale™ Kintex® FPGAs. It utilizes a PMBus interface for current and voltage monitoring and meets Xilinx's low output voltage ripple requirement. This design uses a 5V input and offers a low cost discrete solution.
PMP10600 Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design | TI.com
PMP10600: The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.7: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.3: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.10: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution - PMP10520.3 - TI Tool Folder
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
PMP10711 Simple 6-Channel Power Supply Sequencing Reference Design for Multi-rail Outputs | TI.com
PMP10711: PMP10711 is a 6-channel power supply sequencer that utilizes two LM3880 3-channel sequencer ICs. The design uses an external AND gate and OR gate to power up and power down all 6 channels in sequential fashion. This is useful in cases when up to 6 power rails need to be sequenced during power up and power down.
Altera Cyclone V SoC FPGA Power Reference Design
PMP9353: The PMP9353 reference design is a complete power solution for Altera Cyclone V SoC devices. This design uses several LMZ3 series modules , two LDOs, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power-up sequencing.
PMP10600 Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design | TI.com
PMP10600: The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
Xilinx® Zynq®7000 series (XC7Z015) Power Solution, 5W - Reference Design
PMP10600.1: The PMP10600.1 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
PMP10520 Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution | TI.com
PMP10520: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transcievers (MGT) in Xilinx's Virtex® Ultrascale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
Altera Arria V SoC FPGA Power Solution Reference Design
PMP9360: The PMP9360 reference design is a complete power solution for Altera's Arria V™ SoC devices. This design uses several LMZ3 series modules , an LDO, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power up sequencing.
Simple 6-Channel Power Supply Sequencing Reference Design for Multi-rail Outputs
PMP10711: PMP10711 is a 6-channel power supply sequencer that utilizes two LM3880 3-channel sequencer ICs. The design uses an external AND gate and OR gate to power up and power down all 6 channels in sequential fashion. This is useful in cases when up to 6 power rails need to be sequenced during power up and power down.
Xilinx Virtex® UltraScale™ FPGA Multi-Gigabit Transceiver (MGT) Power Solution with PMBus
PMP10520.1: The PMP10520 reference design provides all the power supply rails (1V/20A, 1.2V/30A, 1.8V/4A) necessary to power the multi-gigabit transceivers (MGT) in Xilinx's Virtex® UltraScale™ FPGAs. This design uses a 5V input and has a PMBus interface for current and voltage monitoring, margining, timing delays, and fault monitoring. It uses both TPS544C20 and TPS544B20 which feature internal current sensing and eliminate the need for an external current sense resistor. This design also meets Xilinx's low output voltage ripple requirements of the MGT rails.
System Level reference design for 30W ADAS system with required Automotive Protections
PMP10652.7: PMP10652 is a System optimized (CISPR 25 Class 3) 30W design for Surround View ADAS system. The design has various protections such as Load dump through TVS (ISO pulse testing), Reverse Voltage (Innovative Smart diode with very low Iq), Battery Disconnect Switch with OVP protection (PFET) and is EMI optimized to meet Conductive EMI limits of CISPR25 Class3 (overall) and Class5 upto 30MHz Range. Input voltage range is between 4.5V to 30V with OVP at 20V and hence will operate in most Cold Cranking conditions. LM74610 is used for Battery reverse protection which utilizes a charge pump to drive an N-channel FET to provide a resistive path for the bypass current to flow. LM53603Q1 is used as front end DC/DC Buck converter which is 2.2MHz switching, Synchronous rectified Wide Vin Buck Converter which can take transient upto 42V. TPS57114Q1 is used to provide power to the cores and it is a high current 2,2MHz switching buck converter. LM26420 is a dual 2.2MHz switching buck converter which is used for generating other required supplies. LM3880 sequencer is used for all the power up and power down sequencing requirements.
Xilinx Zynq 7000 Series (XC7Z045) 20W Reference Design - PMP10613.1 - TI Tool Folder
PMP10613: The PMP10613 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z045) FPGA. This design uses several LMZ3 series modules, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
PMP10630 Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design | TI.com
PMP10630: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
PMP9353 Altera Cyclone V SoC Power Supply Reference Design | TI.com
PMP9353: The PMP9353 reference design is a complete power solution for Altera Cyclone V SoC devices. This design uses several LMZ3 series modules , two LDOs, and a DDR termination regulator to provide all the necessary rails to power the SoC chip. This design also shows correct power-up sequencing.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design - PMP10630.6 - TI Tool Folder
PMP10630: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
Altera Cyclone V SoC Power Supply Reference Design
PMP9353.4: This reference design provides all the power supply rails necessary to power Altera's Cyclone V SoC FPGA. This design uses LMZ3 series modules to generate the rails to power the FPGA.
Xilinx Kintex UltraScale XCKU040 FPGA Power Solution, 6W Reference Design
PMP10630.3: The PMP10630 reference design is a complete high density power solution for Xilinx® Kintex® UltraScale™ XCKU040 FPGA. This design uses an optimal combination of SIMPLE SWITCHER® modules and LDOs to provide all the necessary voltage rails in a small solution size of 36 x 43 mm (1.4 x 1.7 inch). The design includes the LMZ31704 LMZ3 series module to power the core rail and three LMZ21700/1 Nano series modules. The design manages the proper power sequencing using LM3880 sequencer, and it also has an optional DDR3 memory power supply featuring the LP2998 DDR termination regulator. The reference design takes 12V DC input voltage, and the total output power is 6W.
CoreStaff Co Ltd
分销商编号：
st45168818
交货地:
中国大陆
港台地区
单价:
- 阶梯 人民币价格(含税) 美元价格
- 1+ ¥18.1103 $2.3260
- 10+ ¥9.0552 $1.1630
- 50+ ¥7.2410 $0.9300
- 100+ ¥6.5169 $0.8370
- 500+ ¥5.9018 $0.7580
- 1000+ ¥5.5748 $0.7160
- 2000+ ¥5.5047 $0.7070
- 4000+ ¥5.4347 $0.6980
请输入数量：
-+
总计:
库存/包装：
404
起订量：
1
递增量：
1
生产日期：
2015
寄送至：
中国大陆境内
运费规则：
￥870.00
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