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TIDEP0081 Wideband Receiver Design Using 66AK2L06 JESD204B Attach to ADC32RF80 Reference Design | TI.com
TIDEP0081: For wideband receiver system developers currently using FPGA or ASIC to connect High Speed data converters to a baseband processor, who need faster time to market with increased performance and significant reduction in cost, power, and size. This reference design includes the first widely available processor integrating a JESD204B interface and Digital Front End Processing (DFE). Connecting ADC32RF80 to DAC38J84 provides an efficient solution for avionics and defense, test and measurements and industrial applications.
