28F0121-1SR-10中文资料_PDF数据手册

28F0121-1SR-10

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Data Line Filter, 1 FUNCTIONS, 10 A, FERRITE CHIP, SURFACE MOUNT

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Source Content uid

28F0121-1SR-10

不含铅

符合

Active

compliant

EAR99

8504.50.80.00

1.07

3312

Chip Bead

0.001 Ω

DATA LINE FILTER

833 MHz

25 MHz

2.54 mm

8.51 mm

SURFACE MOUNT

125 °C

-45 °C

120 OHM Ω

TR, 13 INCH

10 A

3.05 mm

参考设计

(10)

Reference Design for Telecom Applications (.9V @ .5A)

Reference Design for Telecom Applications (1.05V @ 7A) - PMP4742.5 - TI Tool Folder

PMP4742: For PMP4742.5, the core voltage is supplied by TPS40021, which drives CSD16406 and CSD16409 to deliver 1.05V@7A. The TPS2420 on the 5Vin limits the inrush current "seen" by the 5V source.

Reference Design for Telecom Applications (1.8V @ 4A) - PMP4742.6 - TI Tool Folder

PMP4742: PMP4742.6 supplies the DDR2 memory by means of TPS54620 (1.8V@3.5A) and TPS51200 (0.9V@0.5A). The DDR2 current is monitored by INA210 and shunt resistor.

Reference Design for Telecom Applications (12V @ 1.1A) - PMP4742.1 - TI Tool Folder

PMP4742: PMP4742.1 comprises a negative input (-10.8V to -13.2V) to positive output (12V@1A average) inverting buck-boost converter with TPS40210; a hot swap circuit with TPS2420 quickly limits the output current to 2A peak.

Reference Design for Telecom Applications (24V @ 0.5A)

PMP4742.2: PMP4742.2 is a simple and efficient non synchronous boost converter. It boosts the input 12V to 24V at 150mA nominal, 500mA maximum. Its enable pin is driven by power good signal from the hot swap TPS2420.

Reference Design for Telecom Applications (1.8V @ 4A)

PMP4742.6: PMP4742.6 supplies the DDR2 memory by means of TPS54620 (1.8V@3.5A) and TPS51200 (0.9V@0.5A). The DDR2 current is monitored by INA210 and shunt resistor.

Reference Design for Telecom Applications (12V @ 1.1A)

PMP4742.1: PMP4742.1 comprises a negative input (-10.8V to -13.2V) to positive output (12V@1A average) inverting buck-boost converter with TPS40210; a hot swap circuit with TPS2420 quickly limits the output current to 2A peak.

Reference Design for Telecom Applications (1.2V @ 2A)

PMP4742.4: For PMP4742.4, A second TPS54620 synchronous buck converter, supplies an FPGA at 1.2V@2A. Also, the output current is measured by INA210 and shunt resistor.

Reference Design for Telecom Applications (3.3V @ 5A)

PMP4742.3: PMP4742.3 protects the 12Vin by means of hot swap controller (TPS2420) and feeds a TPS54620, syncronous buck converter, which generates 3.3V@3.7A. An INA210 reads the buck's current for monitoring purposes.

Reference Design for Telecom Applications (1.05V @ 7A)

PMP4742.5: For PMP4742.5, the core voltage is supplied by TPS40021, which drives CSD16406 and CSD16409 to deliver 1.05V@7A. The TPS2420 on the 5Vin limits the inrush current "seen" by the 5V source.

< / 共 10 个参考设计 >

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28F0121-1SR-10

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