93LC46B-I/MS中文资料_PDF数据手册

93LC46B-I/MS

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Microchip Technology Inc

64 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8

技术详情

价格 & 库存

详细参数

Source Content uid

93LC46B-I/MS

不含铅

符合

Active

MSOP

TSSOP, TSSOP8,.19

compliant

EAR99

8542.32.00.51

5 weeks

1248

0.69

2 MHz

200

S-PDSO-G8

3 mm

1024 bit

EEPROM

64 words

SYNCHRONOUS

85 °C

-40 °C

64X16

TOTEM POLE

PLASTIC/EPOXY

TSSOP

TSSOP8,.19

SQUARE

SERIAL

260

Not Qualified

YES

TS 16949

1.1 mm

MICROWIRE

0.000001 A

0.002 mA

5.5 V

2.5 V

3 V

YES

CMOS

INDUSTRIAL

Matte Tin (Sn)

GULL WING

0.65 mm

DUAL

3 mm

6 ms

SOFTWARE

参考设计

(6)

RF Sampling 4-GSPS ADC Reference Design with 8-GHz DC-Coupled Differential Amplifier

TIDA-00431: Wideband radio frequency (RF) receivers allow greatly increased flexibility in radio designs. The wide instantaneous bandwidth allows flexible tuning without changing hardware and the ability to capture multiple channels at widely separated frequencies. This reference design describes a wideband RF receiver utilizing a 4-GSPS analog-to-digital converter (ADC), with an 8-GHz, DC-coupled, fully differential amplifier front end. The amplifier front end provides signal gain and allows capture of signals down to DC, which is not possible with a balun-coupled input.

SimpleLink™ Wi-Fi® Enabled NFC Card Reader

CC3200_NFC_CARD_READER: This TI design combines TI’s Wireless microcontroller (CC3200) and the TRF7970 NFC BoosterPack from third party provider DLP Design, in order to emulate a near field communication (NFC) reader, which securely transfers the data scanned from an NFC card to any remote location or database, in real time over Wi-Fi networks. Disclaimer: DLP Design, Inc. is not associated with DLP® products of Texas Instruments.

Synchronization of JESD204B Giga-Sample ADCs using Xilinx Platform for Phased Array Radar Systems

TIDA-00432: This system level design shows how two ADC12J4000 evaluation modules (EVMs) can be synchronized together using a Xilinx VC707 platform. The design document describes the required hardware modifications and device configurations, including the clocking scheme. Example configuration files are shown for each EVM. The FPGA firmware is described and the relevant Xilinx IP block configuration parameters are shown. Data taken on the actual hardware is shown and analyzed, showing synchronization within 50 ps without characterized cables or calibrated propagation delays.

1-GHz Bandwidth Dual Channel Transmitter up to 4-GHz Reference Design

TIDA-00409: The TSW38J84 EVM reference design provides a platform to demonstrate a wideband dual transmit solution that incorporates an integrated LO. The reference design utilizes the 2.5 GSPS DAC38J84 device with the high performance modulators: TRF3722 (including integrated PLL/VCO) and TRF3705. The TRF3722 and TRF3705 can be combined to form a dual transmit solution with the TRF3722 generating the local oscillator (LO) for both modulators. The interface between the DAC38J84 and the modulators is discussed as well as measurements showing the combined performance of the DAC and modulators. The measurements illustrate the bandwidth performance, output third order intercept performance, harmonic distortion and sideband suppression performance.

Clocking Solution Reference Design for GSPS ADCs

TIDA-00359: Low cost, high performance clocking solution for GSPS data converters. This reference design discusses the use of a TRF3765, a low noise frequency synthesizer, generating the sampling clock for a 4 GSPS analog-to-digital converter (ADC12J4000). Experiments demonstrate data sheet comparable SNR and SFDR performance.

Wi-Fi Camera Application for SimpleLink Wi-Fi CC3200 Launchpad

TIDC-CC3200CAMBOOST: This SimpleLink Wi-Fi CC3200 Launchpad & Camera BoosterPack based design brings Wi-Fi camera capability to new applications as well as existing ones such as door bells. It enables the capture, remote control and transmission of JPEG (VGA or QVGA) images via Wi-Fi.

< / 共 6 个参考设计 >

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