无法从文档中提取型号,请重试

Update your browser

Your browser (Internet Explorer) is out of date.

Update your browser for more security, comfort and the best experience for this site.

首页 > 元器件选型 > 逻辑 > 总线驱动器/收发器

SN74AVC4T245PWR

加入BOM

SN74AVC4T245PWR
已加入BOM:

Texas Instruments

4-Bit Dual-Supply Bus Transceiver with Configurable Voltage-Level Shifting and 3-State Outputs 16-TSSOP -40 to 85

市场均价:
¥6.414
市场总库存:
181,235
生命周期状态: Active
技术详情
价格 & 库存
替代料

CAD 模型信息

模型信息提供方: Samacsys
  • Part Symbol
  • Footprint
  • 3D Model
可下载的格式
  • Allegro
  • Altium
  • Cadence
  • CADSTAR
  • Circuit Studio
  • CR-5000
  • CR-8000
  • DesignSpark
  • DesignSpark PCB PRO
  • DipTrace
  • xDX Designer
  • Eagle
  • EasyEDA
  • Easy-PC
  • eCADSTAR
  • KiCad
  • Mentor
  • OrCAD
  • PADS
  • Proteus
  • Pulsonix
  • Quadcept
  • SOLIDWORKS PCB
  • TARGET 3001!
  • Zuken
  • 下载 CAD 档案

    从 Samacsys 下载 CAD 模型,即表示您同意我们的条款和隐私政策

    参考设计

    (18)
    Power and Thermal Design Considerations Using TI's AM57x Processor Reference Design
    TIDEP0047: This TI Design (TIDEP0047) is a reference platform based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC). This TI Design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037. It includes reference material and documentation covering power management design, power distribution network (PDN) design considerations, thermal design considerations, estimating power consumption, and a power consumption summary.
    TIDEP0047 Power and Thermal Design Considerations Using TI's AM57x Processor Reference Design | TI.com
    TIDEP0047: This TI Design (TIDEP0047) is a reference platform based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC). This TI Design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037. It includes reference material and documentation covering power management design, power distribution network (PDN) design considerations, thermal design considerations, estimating power consumption, and a power consumption summary.
    Altera Arria V GZ FPGA Discrete Power Solution Reference Design
    PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
    TIDC-CC3200-VIDEO SimpleLink™ CC3200-OV788 Video/Audio Streaming Over Wi-Fi Reference Design | TI.com
    TIDC-CC3200-VIDEO: The design enables OV788 ultra-low power video compression chip users to bring live streaming capabilities of audio and video data over Wi-Fi® very easily. It showcases a single chip implementation of RTP video streaming + Wi-Fi connection on the SimpleLink™ CC3200 Wi-Fi wireless micro-controller over 802.11 b/g/n networks from any smart phone, tablet, or computer over local network. This design implementation is well suited with a wide range of Internet of Things (IoT) applications such as battery operated intrusion cameras, door locks, video doorbells and 360-degree multi-cameras in smart homes taking advantage of easy commissioning to a Wi-Fi network and advanced low-power modes from the CC3200 Internet-on-a-chip™ solution.
    Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution
    TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
    ARM MPU with Integrated BiSS C Master Interface Reference Design
    TIDEP0022: Impelementation of BiSS C Master protocol on Industrial Communication Sub-System (PRU-ICSS). The design provides full documentation and source code for Programmable Realtime Unit (PRU).
    TIDEP0025 Single Chip Drive for Industrial Communications and Motor Control | TI.com
    TIDEP0025: This TI design implements a hardware interface solution based on the HEIDENHAIN EnDat 2.2 standard for position or rotary encoders. The platform also allows designers to implement real-time EtherCAT communications standards in a broad range of industrial automation equipment. It enables designers with a low foot print, low power and single chip solution in applications such as industrial automation, factory automation or industrial communication.
    Single Chip Drive for Industrial Communications and Motor Control
    TIDEP0025: This TI design implements a hardware interface solution based on the HEIDENHAIN EnDat 2.2 standard for position or rotary encoders. The platform also allows designers to implement real-time EtherCAT communications standards in a broad range of industrial automation equipment. It enables designers with a low foot print, low power and single chip solution in applications such as industrial automation, factory automation or industrial communication.
    TIDEP0046 Monte-Carlo Simulation on AM57x Using OpenCL for DSP Acceleration Reference Design | TI.com
    TIDEP0046: TI’s high performance ARM® Cortex®-A15 based AM57x processors also integrate C66x DSPs. These DSPs were designed to handle high signal and data processing tasks that are often required by industrial, automotive and financial applications. The AM57x OpenCL implementation makes it easy for users to utilize DSP acceleration for high computational tasks while using a standard programming model and language, thereby removing the need for deep knowledge of the DSP architecture. The TIDEP0046 TI reference design provides an example of using DSP acceleration to generate a very long sequence of normal random numbers using standard C/C++ code.
    TIDEP0035 ARM MPU with Integrated HIPERFACE DSL Master Interface Reference Design | TI.com
    TIDEP0035: Implementation of HIPERFACE DSL Master protocol on Industrial Communication Sub-System (PRU-ICSS). The two wire interface allows for integration of position feedback wires into motor cable. Complete solution consists of AM437x PRU-ICSS firmware and TIDA-00177 transceiver reference design.
    PMP9357 Altera Arria V FPGA Power Supply Reference Design | TI.com
    PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
    TIDEP0036 Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution | TI.com
    TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
    PMP9357 Altera Arria V FPGA Power Supply Reference Design | TI.com
    PMP9357: The PMP9357 reference design is a complete power solution for Altera's Arria V series FPGAs. This design uses several TPS54620 synchronous step down converters, LDOs, and a DDR termination regulator to provide all the necessary rails to power the FPGA. To provide correct power sequencing, a UCD90120A power supply sequencer/monitor is used and can be controlled through I2C.
    Monte-Carlo Simulation on AM57x Using OpenCL for DSP Acceleration Reference Design
    TIDEP0046: TI’s high performance ARM® Cortex®-A15 based AM57x processors also integrate C66x DSPs. These DSPs were designed to handle high signal and data processing tasks that are often required by industrial, automotive and financial applications. The AM57x OpenCL implementation makes it easy for users to utilize DSP acceleration for high computational tasks while using a standard programming model and language, thereby removing the need for deep knowledge of the DSP architecture. The TIDEP0046 TI reference design provides an example of using DSP acceleration to generate a very long sequence of normal random numbers using standard C/C++ code.
    TIDEP0022 ARM MPU with Integrated BiSS C Master Interface Reference Design | TI.com
    TIDEP0022: Impelementation of BiSS C Master protocol on Industrial Communication Sub-System (PRU-ICSS). The design provides full documentation and source code for Programmable Realtime Unit (PRU).
    TIDEP0014 Dual Camera Reference Design based on TMDXEVM437X | TI.com
    TIDEP0014: Developers looking for camera support on the Sitara AM437x processors can use this reference design to jump start their development. The AM437x camera interface is a parallel port that can be configured as a single or dual camera interface. The dual camera configuration enables the use of two simultaneous camera inputs.
    TIDEP0078 OPC UA Data Access Server for AM572x Reference Design | TI.com
    TIDEP0078: OPC UA is an industrial machine-to-machine protocol designed to allow interoperability and communication between all machines connected under Industry 4.0. The TIDEP0078 TI Design demonstrates use of the MatrikonOPC™ OPC UA server development kit (SDK) to allow communications using an OPC UA data access (DA) server running embedded in a project or design. The OPC UA DA deals with real-time data and is best suited for industrial automation applications where time is an important aspect of the data. A reference OPC UA server implementation is provided that accesses the GPIO capabilities of the AM572x IDK. The reference code can be extended to provide an OPC UA interface to any data the AM572x IDK board can access including data acquired through Profibus, RS-485, CAN bus, and industrial Ethernet-based protocols such as EtherCAT™ or PROFINET™ using the Programmable Real-time Unit Industrial Communication Subsystems (PRU-ICSS).
    Dual Camera Reference Design based on TMDXEVM437X
    TIDEP0014: Developers looking for camera support on the Sitara AM437x processors can use this reference design to jump start their development. The AM437x camera interface is a parallel port that can be configured as a single or dual camera interface. The dual camera configuration enables the use of two simultaneous camera inputs.
    显示更多价格 & 库存吗?

    市场价格分析

    没有可用的数据

    价格走势

    库存走势

    分销商库存

    市场总库存
    181,235
    显示更多替代料吗?
    新建BOM