参考设计
(12)
Power and Thermal Design Considerations Using TI's AM57x Processor Reference Design
TIDEP0047: This TI Design (TIDEP0047) is a reference platform based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC). This TI Design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037. It includes reference material and documentation covering power management design, power distribution network (PDN) design considerations, thermal design considerations, estimating power consumption, and a power consumption summary.
TUSB8040AEVM TUSB8040A Evaluation Module | TI.com
TUSB8040AEVM: The TUSB8040AEVM board is a free-standing reference design for a four-port SuperSpeed USB (USB 3.0) hub. It is used to evaluate system compatibility. A SuperSpeed enabled host system and cable is required to evaluate SuperSpeed data transfer. The TUSB8040AEVM will work with USB 2.0 hosts systems as a USB 2.0 hub. No software is required to enable the device. The board will work with any operating system that has USB hub class support built in.
TIDEP0047 Power and Thermal Design Considerations Using TI's AM57x Processor Reference Design | TI.com
TIDEP0047: This TI Design (TIDEP0047) is a reference platform based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC). This TI Design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037. It includes reference material and documentation covering power management design, power distribution network (PDN) design considerations, thermal design considerations, estimating power consumption, and a power consumption summary.
Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution
TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
TIDEP0006 Data Concentrator Reference Design | TI.com
TIDEP0006: The data concentrator reference design gives developers the ultimate level of flexibility and scalability with numerous performance, cost and connectivity options for their data concentrator designs. It includes advanced hardware and software that reduce development time by up to nine months while still supporting connectivity to more than 1,000 smart meters. Developers can easily plug in different connectivity modules, including Sub-1GHz (LPRF), general packet radio service (GPRS), near field communication (NFC) and TI's power line communication (PLC) system-on-module robust G3 and PRIME support.
TIDEP0059 G3-PLC (CENELEC Band) Data Concentrator Reference Design | TI.com
TIDEP0059: The TIDEP0059 reference design implements a complete Power Line Communications (PLC) Data Concentrator based upon the G3-PLC industry standard. It operates in the 36 kHz – 91 kHz band defined by the CENELEC for Smart Grid communications. The reference design includes G3-PLC software which supports the management of up to 1000 G3-PLC end points in a neighborhood area network. The reference design supports the full 312 Kbps data throughput specified by the G3-PLC standard.
TIDEP0058 G3-PLC (FCC Band) Data Concentrator Reference Design | TI.com
TIDEP0058: The TIDEP0058 reference design implements a complete Power Line Communications (PLC) Data Concentrator based upon the G3-PLC industry standard. It operates in the 157 kHz – 487 kHz band defined by the FCC for Smart Grid communications. The reference design includes G3-PLC software which supports the management of up to 1000 G3-PLC end points in a neighborhood area network. The reference design supports the full 312 Kbps data throughput specified by the G3-PLC standard.
TIDEP0046 Monte-Carlo Simulation on AM57x Using OpenCL for DSP Acceleration Reference Design | TI.com
TIDEP0046: TI’s high performance ARM® Cortex®-A15 based AM57x processors also integrate C66x DSPs. These DSPs were designed to handle high signal and data processing tasks that are often required by industrial, automotive and financial applications. The AM57x OpenCL implementation makes it easy for users to utilize DSP acceleration for high computational tasks while using a standard programming model and language, thereby removing the need for deep knowledge of the DSP architecture. The TIDEP0046 TI reference design provides an example of using DSP acceleration to generate a very long sequence of normal random numbers using standard C/C++ code.
TIDEP0036 Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution | TI.com
TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
Monte-Carlo Simulation on AM57x Using OpenCL for DSP Acceleration Reference Design
TIDEP0046: TI’s high performance ARM® Cortex®-A15 based AM57x processors also integrate C66x DSPs. These DSPs were designed to handle high signal and data processing tasks that are often required by industrial, automotive and financial applications. The AM57x OpenCL implementation makes it easy for users to utilize DSP acceleration for high computational tasks while using a standard programming model and language, thereby removing the need for deep knowledge of the DSP architecture. The TIDEP0046 TI reference design provides an example of using DSP acceleration to generate a very long sequence of normal random numbers using standard C/C++ code.
TUSB8040A Evaluation Module
TUSB8040AEVM: The TUSB8040AEVM board is a free-standing reference design for a four-port SuperSpeed USB (USB 3.0) hub. It is used to evaluate system compatibility. A SuperSpeed enabled host system and cable is required to evaluate SuperSpeed data transfer. The TUSB8040AEVM will work with USB 2.0 hosts systems as a USB 2.0 hub. No software is required to enable the device. The board will work with any operating system that has USB hub class support built in.
