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TXS0108EPWR

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TXS0108EPWR
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Texas Instruments

Eight-bit bidirectional voltage-level shifter for open-drain and push-pull applications 20-TSSOP -40 to 85

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¥9.3237
市场总库存:
453,970
生命周期状态: Active
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(14)
Power and Thermal Design Considerations Using TI's AM57x Processor Reference Design
TIDEP0047: This TI Design (TIDEP0047) is a reference platform based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC). This TI Design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037. It includes reference material and documentation covering power management design, power distribution network (PDN) design considerations, thermal design considerations, estimating power consumption, and a power consumption summary.
TIDA-01215 Power Supply Reference Design for Optimizing Spur and Phase Noise in RF-sampling DACs | TI.com
TIDA-01215: This reference design provides an efficient power supply scheme to power-up the RF-sampling DAC38RF8x digital-to-analog data converter (DAC) without sacrificing performance and also reduces board area and BOM. The reference design uses both DC/DC switchers and an LDO to power-up the DAC38RF8x while achieving high analog performance (spurious and phase noise) and minimizing power efficiency trade-offs. The design method outlined here can be extended to the power supply design of other RF-sampling data converters.
TIDEP0047 Power and Thermal Design Considerations Using TI's AM57x Processor Reference Design | TI.com
TIDEP0047: This TI Design (TIDEP0047) is a reference platform based on the AM57x processor and companion TPS659037 power management integrated circuit (PMIC). This TI Design specifically highlights important power and thermal design considerations and techniques for systems designed with AM57x and TPS659037. It includes reference material and documentation covering power management design, power distribution network (PDN) design considerations, thermal design considerations, estimating power consumption, and a power consumption summary.
Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution
TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
TIDA-00352 SDI Video Aggregation Reference Design | TI.com
TIDA-00352: This verified reference design is a complete four channel SDI aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous HD-SDI sources together into one 5.94 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is used to de-aggregate and seamlessly redisplay the original video content.
DisplayPort Video 4:1 Aggregation Reference Design
TIDA-00309: This verified reference design is a complete four channel DisplayPort aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous DisplayPort (DP) sources together into one 10.8 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is used to de-aggregate and seamlessly redisplay the original video content.
TIDA-01240 RF-Sampling S-Band Radar Transmitter Reference Design | TI.com
TIDA-01240: Synthesis of waveforms appropriate for an S-band multifunction phased array radar (MPAR) is demonstrated with an RF sampling architecture utilizing the DAC38RF80, a 9GSPS 16-bit digital-to-analog converter (DAC). The RF sampling transmit architecture simplifies the signal chain, bringing the data converter closer to the antenna, allowing flexibility with high performance.
TIDEP0046 Monte-Carlo Simulation on AM57x Using OpenCL for DSP Acceleration Reference Design | TI.com
TIDEP0046: TI’s high performance ARM® Cortex®-A15 based AM57x processors also integrate C66x DSPs. These DSPs were designed to handle high signal and data processing tasks that are often required by industrial, automotive and financial applications. The AM57x OpenCL implementation makes it easy for users to utilize DSP acceleration for high computational tasks while using a standard programming model and language, thereby removing the need for deep knowledge of the DSP architecture. The TIDEP0046 TI reference design provides an example of using DSP acceleration to generate a very long sequence of normal random numbers using standard C/C++ code.
TI WiLink™8 Wi-Fi®/Bluetooth®/Bluetooth Smart audio multi-room cape reference design
TIDC-WL1837MOD-AUDIO-MULTIROOM-CAPE: The TI WiLink™ 8 WL1837MOD ( http://www.ti.com/product/wl1837mod ) audio cape is wireless multi-room audio reference design used with BeagleBone Black (http://www.ti.com/tool/beaglebk featuring TI Sitara™ AM335x). The WiLink 8 device's WLAN capability to capture and register precise arrival time of the connected AP’s beacon is used to achieve ultra-precise synchronization between multiple connected audio devices. The WiLink 8 module (WL1837MOD) offers integrated Wi-Fi®/Bluetooth® /Bluetooth Smart solution featuring 2.4 GHz MIMO and antenna diversity on 5 GHz band. It offers best in class audio solution featuring multi-room, Airplay® receiver, full audio stack streaming, support for online music services and much more. This TI Design will enable customers to design their own audio boards with Wi-Fi/Bluetooth /Bluetooth Smart connectivity from our WiLink 8 module (WL1837MOD) and evaluate audio multi-room software on it. The BeagleBone Wi-Fi Audio Cape extends a standard TI Sitara processor-based BeagleBone Black with WiLink 8 Wi-Fi /Bluetooth /Bluetooth Smart connectivity and an audio subsystem. The cape and relevant SDK are available at an additional cost from StreamUnlimited.
TIDEP0036 Reference Design using TMS320C6657 to Implement Efficient OPUS Codec Solution | TI.com
TIDEP0036: The TIDEP0036 reference design provides an example of the ease of running TI optimized Opus encoder/decoder on the TMS320C6657 device. Since Opus supports a a wide range of bit rates, frame sizes and sampling rates, all with low delay, it has applicability for voice communications, networked audio and even high performance audio processing application. This design also highlights the performance improvements achieved when implementing the Opus codec on a DSP vs. a general purpose processor, like ARM. Depending upon the level of optimization of the code running on the genral purpose processor, implementing the Opus Codec on a C66x TI DSP core can have 3X the performance of an ARM CORTEX A-15 implementation. TMS320C66x DSPs support both audio and video codecs.
TIDA-01084 Continuous Wave Phase-aligned Multitone Generator: DC-to-6-GHz RF-Sampling DAC Reference Design | TI.com
TIDA-01084: The TIDA-01084 reference design demonstrates the use of RF sampling DAC to generate continuous phase-aligned multitone waveforms. With four 48-bit independent NCOs, the 14-bit, 9GSPS DAC38RF83 can generate four CW tones placed anywhere within the first Nyquist zone or up to 6 GHz in the second. This reference design covers the theory of operations, explanation of the GUI, and directions for programming NCOs to generate the tones without the requirement of an external pattern generator. This design demonstrates an easy-to-use method which greatly simplifies and reduces the bill of materials (BOM) for continuos waveform generation.
Monte-Carlo Simulation on AM57x Using OpenCL for DSP Acceleration Reference Design
TIDEP0046: TI’s high performance ARM® Cortex®-A15 based AM57x processors also integrate C66x DSPs. These DSPs were designed to handle high signal and data processing tasks that are often required by industrial, automotive and financial applications. The AM57x OpenCL implementation makes it easy for users to utilize DSP acceleration for high computational tasks while using a standard programming model and language, thereby removing the need for deep knowledge of the DSP architecture. The TIDEP0046 TI reference design provides an example of using DSP acceleration to generate a very long sequence of normal random numbers using standard C/C++ code.
SDI Video Aggregation Reference Design
TIDA-00352: This verified reference design is a complete four channel SDI aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous HD-SDI sources together into one 5.94 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is used to de-aggregate and seamlessly redisplay the original video content.
TIDA-00309 DisplayPort Video 4:1 Aggregation Reference Design | TI.com
TIDA-00309: This verified reference design is a complete four channel DisplayPort aggregation and de-aggregation solution. One TLK10022 is used to aggregate four synchronous DisplayPort (DP) sources together into one 10.8 Gbps serial link. The serial data is transferred via copper or optical fiber where a second TLK10022 is used to de-aggregate and seamlessly redisplay the original video content.
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